The DDB-VRC5477 evaluation board is designed as a test bed for all the features of the VR5500 processor as well as thefeatures of the VRC5477 interface controller. The VR5477™ system controller is a software-configurable chip that directly connects the VR5500 CPU to SDRAM memory, a 32-Bit PCI bus, and a local bus, without external logic or buffering. From the CPU's viewpoint, the controller acts as a memory controller, DMA controller, PCI bus host bridge, and local bus host bridge. From the viewpoint of PCI agents, the controller acts as master and target on the PCI bus. The controller also has two serial ports and four timers.